#!/bin/bash

die () {
	echo "error: $@" >&2
	exit 1
}

show_help()
{
	cat << EOF
\`configure' configures tc-fpga to adapt to many kinds of boards.

Usage: ./configure [OPTION]..

Configuration:
  -h, --help              display this help and exit
EOF
	exit 0
}

for ac_option; do
	case $ac_option in
	*=?*) ac_optarg=`expr "X$ac_option" : '[^=]*=\(.*\)'` ;;
	*=)   ac_optarg= ;;
	*)    ac_optarg=yes ;;
	esac

	case $ac_option in
	-h | --help)
		show_help
		;;
	esac
done

FPGA_CHIP="xc3s700a-4-fg484"
FLASH_CHIP="xcf04s"

xilinx_dir=
echo -n "checking for Xilinx ISE tools... " >&2
for dir in /usr/local/bin /usr/bin /home/ise/14.7/ISE_DS/ISE/bin/lin64 ~/ise/ISE/bin/lin; do
	[ -x "$dir/xst" ] || continue;
	[ -x "$dir/ngdbuild" ] || continue;
	[ -x "$dir/map" ] || continue;
	[ -x "$dir/par" ] || continue;
	[ -x "$dir/trce" ] || continue;
	[ -x "$dir/bitgen" ] || continue;
	[ -x "$dir/promgen" ] || continue;
	xilinx_dir="$dir"
	break
done
if [ -n "$xilinx_dir" ]; then
	echo "yes" >&2
else
	echo "no" >&2
fi

cat > .config << EOF
XILINXDIR = "$xilinx_dir/"
FPGA_CHIP = $FPGA_CHIP
FLASH_CHIP = $FLASH_CHIP
EOF

cat > src/tc-fpga.prj << EOF
verilog work "tc-fpga.v"
EOF

echo 'work' > src/tc-fpga.lso

cat > src/tc-fpga.xst << EOF
set -tmpdir "xilinx/projnav.tmp"
set -xsthdpdir "xilinx"
run
-ifn tc-fpga.prj
-ifmt mixed
-ofn tc-fpga
-ofmt NGC
-p $FPGA_CHIP
-top main
-opt_mode Speed
-opt_level 1
-iuc NO
-keep_hierarchy No
-netlist_hierarchy As_Optimized
-rtlview Yes
-glob_opt AllClockNets
-read_cores YES
-write_timing_constraints NO
-cross_clock_analysis NO
-hierarchy_separator /
-bus_delimiter <>
-case Maintain
-slice_utilization_ratio 100
-bram_utilization_ratio 100
-verilog2001 YES
-fsm_extract YES -fsm_encoding Auto
-safe_implementation No
-fsm_style LUT
-ram_extract Yes
-ram_style Auto
-rom_extract Yes
-mux_style Auto
-decoder_extract YES
-priority_extract Yes
-shreg_extract YES
-shift_extract YES
-xor_collapse YES
-rom_style Auto
-auto_bram_packing NO
-mux_extract Yes
-resource_sharing YES
-async_to_sync NO
-mult_style Auto
-iobuf YES
-max_fanout 100000
-bufg 24
-register_duplication YES
-register_balancing No
-slice_packing YES
-optimize_primitives NO
-use_clock_enable Yes
-use_sync_set Yes
-use_sync_reset Yes
-iob Auto
-equivalent_register_removal YES
-slice_utilization_ratio_maxmargin 5
EOF

cat > src/tc-fpga.cmd << EOF
setMode -bs
setCable -port svf -file "tc-fpga.svf"
addDevice -p 1 -sprom $FLASH_CHIP -file "tc-fpga.mcs"
addDevice -p 2 -file "tc-fpga.bit"
Program -p 1 -e -v -loadfpga
quit
EOF

cat > src/tc-fpga.ut << EOF
-w
-g DebugBitstream:No
-g Binary:no
-g CRC:Enable
-g Reset_on_err:No
-g ConfigRate:25
-g ProgPin:PullUp
-g DonePin:PullUp
-g TckPin:PullUp
-g TdiPin:PullUp
-g TdoPin:PullUp
-g TmsPin:PullUp
-g UnusedPin:PullDown
-g UserID:0xFFFFFFFF
-g StartUpClk:CClk
-g DONE_cycle:4
-g GTS_cycle:5
-g GWE_cycle:6
-g LCK_cycle:NoWait
-g Security:None
-g DonePipe:Yes
-g DriveDone:No
-g en_sw_gsr:No
-g en_porb:Yes
-g drive_awake:No
-g sw_clk:Startupclk
-g sw_gwe_cycle:5
-g sw_gts_cycle:4
EOF